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module muxn_tb(); reg [15:0] e; reg [3:0] c; wire s; muxn #(4) uut (.entrada(e),.control(c),.salida(s)); initial begin: TB integer i; e={1'b1,{5{3'b101}}}; for (i=0;i<=15;i=i+1) begin c=i; #10 $write ("Control %d y salida %d \n",c,s); end end endmodule
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This page: | Created: | Tue Oct 1 11:42:01 2013 |
From: | ../muxn_tb.v |
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