Release 12.2 - xst M.63c (lin) Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to /home/leon/Dc2014/Verilog/sourceverilog/simples/prueba/xst/projnav.tmp Total REAL time to Xst completion: 0.00 secs Total CPU time to Xst completion: 0.06 secs --> Parameter xsthdpdir set to /home/leon/Dc2014/Verilog/sourceverilog/simples/prueba/xst Total REAL time to Xst completion: 0.00 secs Total CPU time to Xst completion: 0.06 secs --> WARNING:Xst:3164 - Option "-debug" found multiple times in the command line. Only the first occurence is considered. ========================================================================= * HDL Compilation * ========================================================================= Compiling verilog file "../dec2x4b.v" in library work Module compiled No errors in compilation Analysis of file <"dec2x4b.prj"> succeeded. Total REAL time to Xst completion: 1.00 secs Total CPU time to Xst completion: 0.06 secs --> Total memory usage is 132636 kilobytes Number of errors : 0 ( 0 filtered) Number of warnings : 1 ( 0 filtered) Number of infos : 0 ( 0 filtered)