// Use a dual port memory for serial - parallel conversion across
// two clock domains.

// The parallel block use the slow, divided clock

set clock = external "Slow" with {
    extlib = "DK1Sync.dll", extinst = "80", extfunc = "DK1SyncGetSet"
};

// Definition of type dpram and memory to store data

mpram dpram
{
	wom unsigned 8 memwrite[256];
	rom unsigned 8 memread[256];
} mem;


#ifdef SIMULATE
extern "C" int printf(const char *fmt, ...);
void read(void);
#endif

// Input regs
unsigned 1 Read_data;
// Output reg
unsigned 8 parallel_data_out;

void main (void)
{

#ifndef SIMULATE
	interface bus_in (unsigned 1) bi_read_data ();
	interface bus_out () bo_data_out (unsigned 8 out = parallel_data_out);
#endif

	// First used address
	unsigned 8 first;

	// Stop simulation
	unsigned 1 stop;

	// Initialise
	first = 0;
	stop = 0;

	par {

#ifdef SIMULATE
		seq {
			delay;
			delay;
			delay;
			delay;
			delay;
			delay;
			read();
			read();
			read();
			stop = 1;
		}
#endif

#ifndef SIMULATE
		while (!stop)
			// Get inputs
			Read_data = bi_read_data.in;
#endif

		// Read word out of FIFO
		while (!stop) {
			if ( Read_data ) {
				parallel_data_out = mem.memread[first];
				first++;
			}
		}

	}	

}

#ifdef SIMULATE

void read (void)
{
	Read_data = 1;
	Read_data = 0;
	delay;
	printf("Data read: 0x%x\n", parallel_data_out);
}

#endif