// Use on-chip memory blocks for serial - parallel conversion

set clock = external "Dummy";

#ifdef SIMULATE
extern "C" int printf(const char *fmt, ...);
void write(unsigned 8);
void read(void);
#endif

// Input regs
unsigned 1 Data_in, Start, Read_data;
// Output reg
unsigned 8 parallel_data_out;

void main (void)
{

#ifndef SIMULATE
	interface bus_in (unsigned 1) bi_data_in ();
	interface bus_in (unsigned 1) bi_data_start ();
	interface bus_in (unsigned 1) bi_read_data ();
	interface bus_out () bo_data_out (unsigned 8 out = parallel_data_out);
#else
	
#endif

	// Shift register
	unsigned 8 SR;

	// Memory to store parallel data
	ram unsigned 8 mem[256] with { block = 1 };

	// First used address
	unsigned 8 first;

	// Next free address
	unsigned 8 next;

	// Stop simulation
	unsigned 1 stop;

	// Initialise
	first = 0;
	next = 0;
	stop = 0;

	par {

#ifdef SIMULATE

		// Test stimulus
		seq {

			write(0x01);
			write(0x02);
			write(0x03);
			write(0x04);
			write(0x05);
			write(0x06);
			write(0x07);
			write(0x08);
			read();
			read();
			read();
			stop = 1;
		}

#endif

		while (!stop) par {

#ifndef SIMULATE

			// Get inputs
			Start = bi_data_start.in;
			Data_in = bi_data_in.in;
			Read_data = bi_read_data.in;

#endif
			// Shift serial data into SR
			SR = Data_in @ SR[7:1];
		}

		// Load word into FIFO
		while (!stop) {
			if ( Start ) {
				mem[next] = SR;
				next++;
			}
		}

		// Read word out of FIFO
		while (!stop) {
			if ( Read_data ) {
				parallel_data_out = mem[first];
				first++;
			}
		}

	}	

}

#ifdef SIMULATE

void write ( unsigned 8 data )
{
	par {
		seq {
			Start = 1;
			Start = 0;
		}
		seq {
			Data_in = data[0];
			Data_in = data[1];
			Data_in = data[2];
			Data_in = data[3];
			Data_in = data[4];
			Data_in = data[5];
			Data_in = data[6];
			Data_in = data[7];
		}
	}
}

void read (void)
{
	Read_data = 1;
	Read_data = 0;
	delay;
	printf("Data read: 0x%x\n", parallel_data_out);
}

#endif